The first lateral two-zone reduced surface field MOSFETs in 4H-SiC with NO annealing are reported. Interface properties of 4H-SiC-SiO are improved, with inversion layer field-effect mobility increased to 25 cm V s, five times higher than that of dry reoxidation process, and with channel resistance significantly reduced. Devices are normally off with low leakage current. Threshold voltage is around 3 V. Blocking voltage of 930 V and specific on-resistance of 170 m cm were obtained. Large-area devices with multifinger geometry are also demon- strated with scaled-up current. The output characteristics exhibit excellent linear and saturation regions. Index Terms—Field-effect mobility, field-effect transistors, in- terface, MOS, NO annealing.
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Wang et al. (2004) studied this question.