Charge trapping induced current instability in pentacene thin film transistors: Trapping barrier and effect of surface treatment

The current instability of pentacene thin film transistors is described by the energetic distribution of the barrier height for the trapping of mobile charges at the organic/insulator interface. The trapping energy was quantitatively analyzed by measuring the temperature dependence of current decay, which follows a stretched exponential function. The distribution of the barrier becomes higher and narrower by the use of a self assembled monolayer (SAM) on the insulator surface, whereas the pentacene film morphology has little influence on the trapping barriers. The increase in the barrier height in the SAM-treated device suppresses charge trapping, resulting in stable device operation.