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This letter illustrates a general analytical method for power dc–dc converters called averaging binary tree structure representation. The proposed method, based on switching signal flow graph (SSFG) models, describes the converters as a binary tree structure. General construction principles of the binary tree for the complex flow graph system are summarized and developed. The proposed method has been applied to the analysis for second-order dc–dc converters. It shows the advantages of high convenience and practicability compared with conventional SSFG analytical methods. Simulation and experimental observations are provided to validate the proposed algorithm.
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Zhu et al. (2007) studied this question.
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