Extraction of Difference in Parasitic Impedance of Electrical and Electronic Devices Mounted on Different Printed Circuit Boards

In product electromagnetic compatibility (EMC) design, accurately obtaining the S-parameter characteristics of electrical and electronic devices is a fundamental and crucial requirement. S-parameters are measured after mounting the device on a test board; however, these characteristics typically include parasitic impedances caused by factors such as the board structure, device mounting pads, and soldering. This can lead to the device exhibiting different characteristics when mounted on different boards. In this study, we investigated a method to extract parasitic impedances that contribute to characteristic differences in devices mounted on different boards. This method simultaneously estimates which device the parasitic impedance is associated with and its value based on analysis using simulated annealing, a parameter optimization technique, and the properties of cascaded ABCD parameters. We verified the method's validity using a common mode choke as an example, a representative EMC design component, through both circuit simulations and experiments. Both results demonstrate that the method can identify the value of the parasitic impedance and distinguish which device it is part of.