Design Challenges in the Use of Silicon Carbide JFETs in Matrix Converter Applications

This paper investigates some of the challenges encountered during the implementation of a Silicon Carbide JFET matrix converter which has been designed to meet a specific power density of 20 kW/L with forced air cooling. After a brief introduction to the main features of the hardware implementation of the power converter, an insight into the control strategy and controller platform adopted is given with a particular attention to the issues relating to the high switching frequencies on the controller requirements and the performance implications of the gate drive circuitry. An analysis of the results which show the effects of gate driver and controller-induced commutation time limitations on the output waveform quality is presented. Wide bandgap semiconductor devices offer the power electronic engineer new opportunities for high-speed, high-efficiency designs but these devices cannot be used as a simple like for like replacements and as such the whole converter system needs to be looked at in order to successfully exploit these devices.