Nowadays, three‐phase multilevel inverters are widely employed in medium and high‐power applications, increasing the power ratings, improving the output voltage quality and reducing the conducted electromagnetic interferences. Despite of numerous pulse‐width modulation (PWM) techniques have been developed for multilevel inverters, a detailed analysis of the output current ripple amplitude has not been reported yet. In this study, the peak‐to‐peak current ripple distribution over a fundamental period is analysed in details specifically for three‐level three‐phase voltage source inverters for both motor‐load and grid‐connected applications. In particular, the peak‐to‐peak amplitude of the current ripple is determined analytically as a function of the modulation index. The centred PWM strategy is considered in all the developments, implemented either by carrier‐based or space vector (SV) PWM methods. With this modulation, the dc bus utilisation is maximised in a simple and effective way, and a nearly‐optimal behaviour is obtained to minimise the current ripple rms. The results obtained in different cases and sub‐cases identified in the proposed analytical approach are verified by experimental tests with reference to three‐phase three‐level neutral‐point clamped configuration.
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Grandi et al. (2014) studied this question.
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