The parallel operation of voltage regulator modules (VRMs) for high-end microprocessors requires a current-sharing (CS) circuit to provide a uniform load distribution among the modules. A good dynamic performance of the CS circuit is very important since the microprocessors present highly dynamic loads to the VRMs. Stability and dynamic performance of the CS control are considered. To assess these issues, a comprehensive small-signal model of the paralleled VRMs was developed and verified.
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Panov et al. (2002) studied this question.
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