This paper presents a high-speed, low-power modulator driver featuring a novel modified breakdown voltage doubler (BVD) topology. Further speed enhancement and reduction of power consumption is achieved by multiple frequency compensation methods. An optimization method combining small and large-signal analyses is presented. The driver was fabricated in a 0.25-μm SiGe BiCMOS technology withfTof up to 180 GHz. It features 13-dB differential gain, a small-signal bandwidth of 33.7 GHz and delivers a single-ended output swing of 3 Vpp (6 Vpp differential) at 40 GBit/s into a 50-Ω load consuming only 1.35 W of DC power.
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Knochenhauer et al. (2011) studied this question.
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