Design Flow for High Switching Frequency and Large-Bandwidth Analog DC/DC Step-Down Converters for a Polar Transmitter

System-on-chip requirements for energy management push both technology and design of voltage regulators to their limits. Integration constraints are added to high performance needs in terms of power efficiency and dynamic performance of the power converters. Switch-mode power supplies (SMPSs) are intended to supplant linear voltage regulators. This paper details a methodology to deal with different tradeoffs introduced by various specifications and constraints of embedded SMPSs. The design methodology is applied to the standard analog step-down SMPS architecture operating at very high switching frequency, and verified experimentally. The results are measured on test chips fabricated in standard 0.25-m BiCMOS technology, operating between 10 and 200 MHz, respectively, with a power efficiency up to 80% and a small-signal bandwidth of 1.2 and 15 MHz, respectively.