Demonstration and performance of a recirculating sorter based on complementary metal oxide semiconductor logic and vertical cavity surface emitting lasers

The demonstration of an optoelectronic sorter unit is pre- sented. This sorter is constructed using a recirculating architecture that passes data optically between two smart-pixel arrays. Each array is implemented using a hybrid combination of CMOS logic and vertical cav- ity surface emitting lasers (VCSELs). Since implementation of this sys- tem is intended as a tool for evaluating the technological issues associ- ated with CMOS/VCSEL smart-pixel device, the system implementation is designed to minimize interconnect complexity while focusing on the smart-pixel design and analysis. A power budget analysis indicates that the photoreceivers require a minimum of 130 mW of optical input power, which leads to a VCSEL power requirement of '415 mW. The fre- quency response of the photoreceivers and logic circuit reveals that the photodetector limits the operation to '3 MHz, which is an order of mag- nitude slower than the logic circuits frequency limit.