A miniature broad-band balanced frequency doubler has been designed to operate from 30 to 50 GHz. It comprises a reduced-size 180/spl deg/ rat-race hybrid and two distributed doublers to form a balanced doubler configuration. The balanced distributed doubler suppresses the 180/spl deg/ out-of-phase fundamental and third harmonic signals at the output port while combining the in-phase second harmonic signal. A measured conversion loss of 5-7 dB from 30- to 50-GHz output frequencies is achieved with fundamental and third harmonic signals rejection better than 13 and 25 dB, respectively. The chip size is only 1.5/spl times/1 mm/sup 2/.
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Deng et al. (2003) studied this question.
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