Diode-Steered Magnetic-Core Memory

This paper describes techniques which take advantage of word arrangement to make possible large, high-speed magnetic-core memories at moderate cost. Economy is obtained by means of a two-coordinate selection system using diffused junction rectifiers as steering diodes. By taking advantage of the relatively slow recovery time of these rectifiers, automatic rewrite selection is obtained in a similar sense to that provided by a biased switch core. The familiar ``inhibit'' line is eliminated, reducing the memory array to a two-wire configuration. And finally, the customary core array geometry is rearranged to facilitate winding the digit wire as a balanced twisted-pair transmission line so as to eliminate the effect of post-write disturb.