Modelling of kinetics of creation and passivation of interface traps in metal-oxide-semiconductor transistors during postirradiation annealing

The dependencies of creation–passivation processes of interface traps in irradiated n-channel metal-oxide-semiconductor transistors on the temperature and gate bias during annealing have been investigated. The experimental results, which are explained by the hydrogen–water (H–W) model, show the influence of both the annealing temperature and gate bias on these processes. The modelling of creation–passivation kinetics of interface traps, based on bimolecular theory and numerical analysis, is also performed. Numerical modelling shows that the H–W model can include the temperature and gate bias dependencies of creation of interface traps, latent interface trap buildup and the decrease of interface trap density.