Deep Level Transient Spectroscopy (DLTS) has been applied to Metal-Oxide-Semiconductor (MOS) capacitors fabricated on crystalline silicon n- and p-type substrates, with a SiO 2 or a SiO 2 /SiN x passivation stack, covered by an Al gate. It is shown that similar interface state distributions are obtained in both cases, from which it is concluded that the SiN x deposition does not degrade the interface. It is also shown that a rather large density of dangling bond defects is present at the Si/SiO 2 interface, which is related to the absence of a post metallization forming gas annealing.
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Simoen et al. (2011) studied this question.
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