In this paper, a sub-100mV ultra-low-voltage level-shifter for wide-range voltage conversion to I/O voltage is presented. The level-shifter uses a current limiting diode-connected transistor with crosscoupled transistor structure to reduce the minimum input voltage down to 100mV while covering a wide output voltage range up to I/O supply voltage (3V). We propose an improved split-control output buffer to reduce the static current from VDDH to VSS. The level-shifter is implemented using X-FAB 180nm HV CMOS process. The post-layout simulations show that the proposed structure achieves an average propagation delay of 7.57μ s with a power consumption of 3.43nW when the supply voltages VDDL, VDDH, and input frequency are 100mV, 3V, and 1kHz, respectively. The design occupies 182.46μ m2silicon area with a static power consumption of 3nW when VDDL and VDDH are 100mV and 3V, respectively, which is suitable for low power applications.
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Chen et al. (2020) studied this question.
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