Fabrication of High-Performance Thin-Film Transistors on Glass Substrate by Atmospheric Pressure Micro-Thermal-Plasma-Jet-Induced Lateral Crystallization Technique

Amorphous silicon (a-Si) films deposited by plasma-enhanced chemical vapor deposition (PECVD) were patterned to strips with a width ranging from 1 to 50 µm, and irradiated with an atmospheric pressure micro-thermal-plasma-jet (µ-TPJ) to induce high-speed lateral crystallization (HSLC). From electron backscattering diffraction patterns (EBSPs), the growth of ∼20-µm-long single grains was observed in a narrow line of 1 µm width under a µ-TPJ scan speed as high as 4000 mm/s. TFTs with a large channel length ( L )/width ( W ) of 40 µm/50 µm show a field-effect mobility (µ FE ) of 284 cm 2 V -1 s -1 , whereas decreasing W monotonically increased µ FE to 477 cm 2 V -1 s -1 at W = 2 µm. By applying µ-TPJ to strip a-Si films, we can form single-crystalline Si at predetermined positions and obtain TFTs with reasonably high performance. We confirmed that HSLC is applicable to a-Si films on conventional glass substrates without crack generation by either inserting a buffer layer underneath a-Si films, or heating the samples during µ-TPJ irradiation. A new positioning method using a Si slit mask is also demonstrated. TFTs fabricated on glass with a buffer layer inserted underneath the a-Si films show a high µ FE of 267 cm 2 V -1 s -1 .