Retention analysis of the memorized states of the MFIS structure for ferroelectric-gate FET memory by considering leakage current through ferroelectric and insulator layers

Retention of the memorized states in MFIS structures has been simulated and discussed. Consistent results of retention characteristics are obtained by combining leakage current characteristics, Poisson's equation and charge continuity equation. Leakage current induced by the electric field in ferroelectric and insulator layers deteriorates memorized states. This leakage current is modeled from the measured one. As the thickness of SiO2 insulator layer decreases, retention time increases with increment of the initial ferroelectric polarization and decrement of the depolarization field. On the other hand, we can derive optimum values of work function difference between the top electrode and Si and the thickness of ferroelectric layer. Finally, calculated retention characteristics of the capacitance is compared to the measured one and leakage current characteristics required to obtain 10 years of retention time are estimated.