Partial Power Processing for Power Decoupling Network in Three-Phase Three-Leg Four-Wire Three-Level T-Type Inverter With Reduced Split DC-Bus Capacitance

The three-phase three-leg four-wire (3P3L4W) three-level (3L) inverter demands large split dc-bus capacitors for limiting the voltage ripple resulting from the neutral current, which mainly pulsates at the fundamental output frequency, and the midpoint current, which mainly pulsates at triple the output frequency. This article embeds a power decoupling network (PDN) in the basic 3P3L4W 3L inverter for reducing the split dc-bus capacitance. To curb excessive power losses, partial power processing is proposed to make the PDN partially bypass the neutral current and the midpoint current, such that the split dc-bus capacitance could be reduced at the expense of affordable power losses. Finally, a 10-kVA PDN embedded 3P3L4W 3L T-type inverter is built and tested in the laboratory, and experimental results are presented to verify the feasibility of the proposed work.