Signal Integrity Verification of Multichip Links Using Passive Channel Macromodels

This paper presents a general strategy for the electrical performance and signal integrity assessment of electrically long multichip links. A black-box time-domain macromodel is first derived from tabulated frequency responses in scattering form. This model is structured as a combination of ideal delay terms with frequency-dependent rational coefficients. A new identification scheme is presented, which is based on an initial blind delay estimation process followed by a refinement loop based on an iterative delayed vector fitting process. Two alternative passivity enforcement schemes based on local perturbations are then presented. The result is an accurate and guaranteed passive delay-based macromodel, which is synthesized as a SPICE-compatible netlist for channel analysis. The proposed procedure enables safe and reliable circuit-based transient simulations of complex multichip links, including nonlinear drivers and receivers. The performance of the proposed flow is demonstrated on a large number of channel benchmarks.