Resistance switching and retention behaviors in polycrystalline La-doped SrTiO3 ceramics chip devices

Resistance switching and retention behaviors in polycrystalline La-doped SrTiO3 ceramics have been investigated. La-doped SrTiO3 ceramics exhibits resistance switching as large as that of thin-film devices and exhibits a long-term memory effect of over 5 h. By means of a complex impedance analysis, it was clarified that these resistance changes can be reasonably attributed to the change in the electrical potential barrier at the interfaces and the resistance of the grain boundary changes remarkably by the application of voltage pulses. From the resistance retention properties at various temperatures, it was found that the high-resistance state is very stable even at 125 °C, whereas the resistance in the low-resistance state increases with time and its relaxation speed becomes remarkably faster with increasing temperatures. These results imply that the migration of the point defects could change the distribution of the space charge near the interface, resulting in a change in the interface resistances.