Experimental device study demonstrates a ternary inverter in a single polymer transistor via sequential doping, highlighting molecular design rules for high-density multi-valued logic circuits.
Multi‐valued logic (MVL) offers a promising approach to overcoming the intrinsic limitations of binary computing by enhancing data density at the device level. However, achieving stable and well‐defined multi‐level logic states within a single semiconductor channel layer remains a significant challenge. In this work, we demonstrate a ternary inverter based on a two‐step doping mechanism in a single polymer semiconductor channel incorporated into an organic electrochemical transistor (OECT). The device exhibits a robust intermediate conduction state characterized by zero‐differential transconductance (ZDT). The face‐on molecular orientation and dense alkyl side‐chain packing initially impede ion penetration, giving rise to surface‐confined electrostatic gating at low gate voltages ( V G ), before transitioning to bulk volumetric electrochemical doping at higher V G . This sequential doping mechanism yields a wide and stable ZDT plateau, an effect that is less pronounced in polymer semiconductors adopting edge‐on orientations or amorphous microstructures. This work highlights the critical role of molecular orientation and side‐chain packing in realizing distinct multi‐level logic states, offering design guidelines for MVL circuits.
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Park et al. (2026) studied this question.
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