We report a design and implementation of lateral silicon photodetectors fabricated on a silicon-on-insulator (SOI) substrate in a complementary CMOS-compatible process. In addition, we disscuss the structure dependences on the frequency and optimum design for a maximum bandwidth. A standard device fabricated with a 210 nm absorbing layer, a finger width of 1.00 µm, a finger spacing of 1.63 µm, a square detector area of 20 × 20 µm 2 , and a pad size of 60 × 60 µm 2 achieved a bandwidth of 12.6 GHz at a bias voltage of 10 V, with a responsivity of 7.5 mA/W at 850 nm wavelength. A photodetector with the same geometry, which was fabricated with a smaller pad size of 30 × 30 µm 2 , exhibited a bandwidth of 13.6 GHz.
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Li et al. (2015) studied this question.
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