High-efficiency converters with excellent low ripple regulated output load must feature the outstanding switching loss reduction mechanism. The rapid advancement of low-loss converter design has posed stringent challenges to designers for efficient power delivery and tight voltage regulation. In this work, the new synchronous rectifier buck converter (SRBC) circuit is proposed. It has been found that the SRBC can operate effectively at 1 MHz switching frequency with low switching and gate drive losses operating in zero-voltage switching condition.
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Yahaya et al. (2011) studied this question.
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