Design and fabrication of a high-density multilayer metal–insulator–metal capacitor based on selective etching

This paper presents a novel and cost-effective method for fabricating high-density multilayer metal–insulator–metal (MIM) integrated capacitors. To eliminate the usage of numerous photolithography steps when parallel stacking multiple capacitors layers, a unique process has been developed based on depositing the MIM layers onto a substrate with two protruding pillars, polishing down the pillars to expose the multilayer cross sections and then selectively etching the metal layers on each pillar to form the alternating capacitor plate electrodes. For demonstration purpose, only capacitors with two dielectric layers were fabricated, and the measurement results were verified by a compact analytical model together with finite element simulations. With 200 nm thick silicon nitride/oxide dielectric layers, a capacitance density of 0.6 fF µm−2 was achieved, which can be easily increased by scaling down the layer thicknesses and/or stacking more layers. A low equivalent series resistance (ESR) of 300–700 mΩ was measured, and the self-resonance frequency was above measurement limits (>100 MHz). Further design optimization shows that the ESR can be reduced to below 80 mΩ, while the operation frequency extended to above 2.6 GHz.