Architectural and circuit techniques to integrate the RF front end passive components, namely the SAW filters and duplexers that are traditionally implemented off chip, are presented. Intended for software-defined and cognitive radio platforms, tunable high-Q filters realized by CMOS switches and linear or MOS capacitors allow the integration of highly reconfigurable transceiver front ends that are robust to in-band and out-of-band blockers. Furthermore, duplexer techniques based on electrical balance concepts are introduced to enable highly integrated and programmable radios for full-duplex applications such as 3/4G transceivers. Several case studies are presented that offer highly linear and low-noise transceiver front ends that satisfy the challenging requirements of cellular standards, yet offer considerably lower cost and size compared to the state-of-the-art transceivers available today.
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Darabi et al. (2011) studied this question.
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