Energy-efficient non-volatile latch using SOT-MTJ for enhanced logic and memory applications

This paper presents a pioneering self-SHE assisted Spin-Orbit Torque Magnetic Tunnel Junction (SOT-MTJ) design, meticulously crafted for enhancing logic-in-memory applications. A novel Non-Volatile (NV) latch based on SOT-MTJ technology is proposed, demonstrating superior energy efficiency and compactness. The proposed NV latch achieves a power dissipation of 18.87 μ W, energy consumption of 75.4 fJ, and a delay of 0.2 ns, setting a new benchmark in NV latch performance. When incorporated into a 1-bit NV full adder, the design achieves a power consumption of 6.55 μ W, a delay of 86.57 ps, and requires only 59 MOS + 1 MTJ, showcasing its compactness and efficiency compared to conventional designs. These advancements underline the proposed SOT-MTJ-based NV latch and full adder as pivotal components for energy-efficient, high-performance non-volatile logic circuits, paving the way for future innovations in LiM architectures.