Scaleable Single-Photon Avalanche Diode Structures in Nanometer CMOS Technology

Single-photon avalanche photodiodes (SPADs) operating in Geiger mode offer exceptional time resolution and optical sensitivity. Implementation in modern nanometer-scale complementary metal-oxide-semiconductor (CMOS) technologies to create dense high-resolution arrays requires a device structure that is scaleable down to a few micrometers. A family of three SPAD structures with sub-100-Hz mean dark count rate (DCR) is proposed in 130-nm CMOS image sensor technology. Based on a novel retrograde buried n-well guard ring, these detectors are shown to readily scale from 32 to 2 μm with improving DCR, jitter, and yield. One of these detectors is compatible with standard triple-well digital CMOS, and the others bring the first low-DCR realizations at the 130-nm node of shallow-trench-isolation-bounded and enhancement SPADs.