Experimental evaluation demonstrates enhanced video coding performance on an open-source heterogeneous platform, highlighting the efficiency of combining RISC-V cores with dedicated accelerators.
In this work, we present performance and energy optimizations on our applications using the HERO, a high-performance heterogeneous research platform, with our own dedicated image and video processing accelerators integrated into the platform hardware and software stack. HERO is an open-source heterogeneous platform, which combines general-purpose ARM Cortex-A processor or 64-bit RISC-V as a host/controller CPU, and programmable manycore accelerator fabric consisting of multiple small RISC-V cores specialized with custom extension instructions (programmable accelerators). On the other hand, we extend HERO by integrating fully specialized, i.e. dedicated image and video processing accelerators adding yet another level of specialized acceleration (dedicated accelerators) alongside platform-provided programmable accelerator (ISA-extended RISC-V manycore). The applications used for testing and performance analysis are Bolt65 and Jaguar. Bolt65 is our performance-optimized HEVC hardware/software suite for Just-in-Time video transcoding, while Jaguar is our software/hardware solution for JPEG encoding and decoding aiming at performance efficiency in embedded systems. We developed and integrated two dedicated accelerators, one for each application use-case. HEVC accelerator is designed as a fully modular accelerator tile with 4 main computation kernels chosen by profiling the HEVC. The JPEG accelerator is designed to speed up two computationally demanding kernels, IDCT and dequantization steps of JPEG encoder/decoder. We present our findings in terms of achieved performance and ease of integration and overall programmability.
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Ramljak et al. (2026) studied this question.
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