This brief describes an integrated system performing automatic matching of antenna impedance, suitable for applications within the 433 MHz ISM band. The detected impedance can be matched to 50 Ω. Consequently the input S-parameter of the antenna can be reduced far below -20 dB. This system has been implemented on a 130-nm CMOS SOI technology process with an integrated π matching network. The design of the chip is focused for measure and correct impedance of the antenna. Both simulation and measured results are presented to validate the methodology.
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Foucauld et al. (2018) studied this question.
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