Low-Voltage Oxide-Based Electric-Double-Layer TFTs Gated by Stacked SiO₂ Electrolyte/Chitosan Hybrid Dielectrics

Low-voltage oxide-based electric-double-layer (EDL) thin-film transistors (TFTs) gated by stacked SiO2electrolyte/chitosan proton-conductor hybrid dielectric have been fabricated on glass substrates at room temperature. Such EDL TFTs exhibit a saturation mobility (μsat) of 7.8 cm2V-1s-1, a subthreshold swing (S) of 100 mV/decade, a drain current on/off ratio (Ion/off) of 7.8 × 105, and a threshold voltage (Vth) of -0.48 V. After aging for one month in air ambient without surface passivation, such device shows μsatof 3.5 cm2V-1s-1, Ion/offof 1.2 × 105, and S of 120 mV/decade. Control experiments demonstrate that devices gated by stacked SiO2electrolyte/chitosan hybrid dielectrics show improved stability compared with TFTs gated by single chitosan or single SiO2electrolyte gate dielectric.