The density of interface states has been investigated experimentally on silicon nanowire transistors (SNWTs), with a high-k/metal gate stack. Low temperature measurements down to 25 K have been performed to determine the interface trap energy distribution throughout the Si band gap on nanowire devices. We have shown that SNWTs exhibit a higher trap density together with a modified energy profile as compared to conventional planar devices. Finally these spectroscopic measurements have been compared to electron mobility to complete the analysis and to further understand the impact of the interface on carrier transport.
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Cassé et al. (2010) studied this question.
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