Hysteresis loops of ferroelectric bilayers and superlattices

A ferroelectric superlattice with an antiferroelectric interfacial coupling is considered; the same model describes a bilayer with antiferroelectric coupling. By mapping minimum points in the Landau free energy expression and plotting them against the applied electric field, a triple hysteresis loop pattern is obtained. The loop patterns vary between typically ferroelectric and typically antiferroelectric depending on the layer thicknesses and the magnitude of the interfacial-coupling constant. This work suggests the possibility of designing multilayer elements for computer memories with four or more different storage states.