This letter investigates the feasibility of adjusting the work function (WF) of TaN metal gate by intermixing (InM) of ultra-thin TaN/Metal stacks at high temperature. This could be useful for the integration of dual-WF metal gates in a gate-first CMOS process without exposing gate dielectric during metal-etching process. TaN/Tb and TaN/Ir stacks were studied, and it is found that the WF of TaN can be readily modulated through metal InM in TaN/Tb stack after high-temperature treatment (~1000 degC), which simulates the source/drain dopant activation process in a gate-first CMOS process. Factors affecting the InM process will be discussed. Successful transistor threshold voltage adjustment by ~300 mV on high-kappa HfTaON/HfO2dielectrics has also been demonstrated in TaN/Tb stack using this technique
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Ren et al. (2006) studied this question.
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