Key result
A fully integrated patch-clamp measurement system was implemented in a 0.5-µm silicon-on-sapphire process, capable of recording cell membrane currents up to ±20 nA with 5 pA rms noise.
The development of a fully integrated patch-clamp measurement system with compensation capabilities enables the fabrication of high-throughput planar patch-clamp systems.
May enable compact high-throughput electrophysiology tools; leaves open clinical validation in cardiac ion channel research.
We present the first fully integrated implementation of a patch-clamp measurement system with series-access resistance and parasitic capacitive compensation capability. The system was implemented in a 0.5- mum silicon-on-sapphire process and is capable of recording cell membrane currents up to plusmn20 nA, with an rms noise of 5 pA at 10-kHz bandwidth. The system can compensate for the capacitance and resistance of the electrode, up to 20 pF and up to 70% of the series-access resistance, respectively. The die size is 1150 by 700 mum. The power consumption is 300 muW at 3.3 V. The integrated patch-clamp system will be used to fabricate high-throughput planar patch-clamp systems.
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Weerakoon et al. (2009) studied this question. Integrated patch-clamp measurement system was evaluated on Cell membrane current recording capability and compensation. A fully integrated patch-clamp measurement system was implemented in a 0.5-µm silicon-on-sapphire process, capable of recording cell membrane currents up to ±20 nA with 5 pA rms noise.
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