We demonstrated the construction of complementary metal-semiconductor (CMES) inverters with single n- and p-type nanowires (NWs) on the same chip. A single p-type NW was assembled by the side of an n-type NW via the electric field assembly method. n- and p-channel metal-semiconductor field-effect transistors were fabricated with n- and p-type NWs, respectively. Based on this, high-performance NW CMES NOT logic gate (inverter) was built. The NW CMES inverters have low operating voltage (≤2 V), high voltage gain (≥7), and low static power dissipation (≤0.3 nW).
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M. et al. (2008) studied this question.
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