Supporting Bulk Synchronous Parallelism with a high‐bandwidth optical interconnect

The list of applications requiring high‐performance computing resources is constantly growing. The cost of inter‐processor communication is critical in determining the performance of massively parallel computing systems for many of these applications. This paper considers the feasibility of a commodity processor‐based system which uses a free‐space optical interconnect. A novel architecture, based on this technology, is presented. Analytical and simulation results based on an implementation of BSP (Bulk Synchronous Parallelism) are presented, indicating that a significant performance enhancement, over architectures using conventional interconnect technology, is possible.