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An efficient method is proposed for placing modules in large and highly complex sea-of-gates chips that include preplaced I/O pads and macrocells. PROUD repeatedly solves sparse linear equations. A resistive network analogy of the placement problem and convexity of the objective function are key concepts in this algorithm. The algorithm was tested on nine real circuits. For a triple-metal-layer, 100000-gate sea-of-gate design with 26000 instances, the constructive phase took 50 minutes on a VAX 8650 and yielded excellent results for total wire length. Extensions of the method are considered.>
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Tsay et al. (1988) studied this question.
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