Negative Conductance Properties in Extremely Thin Silicon-on-Insulator (SOI) Insulated-Gate pn-Junction Devices (SOI Surface Tunnel Transistors)

In this paper the occurrence of negative conductance at temperatures of less than 90 K in a silicon-on-insulator (SOI) surface tunnel transistor with a 10-nm-thick silicon layer fabricated on a separation by implanted oxygen (SIMOX) substrate is reported. Through comparison with the performance of an SOI surface tunnel transistor with a 90-nm-thick silicon layer, the advantages of the two-dimensional confinement effect are shown.