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The carrier charging/discharging characteristics in a multidot Si nanocrystal floating gate memory are investigated by measuring the gate current directly. To detect a small gate current, we use a large device-size memory. In the gate current characteristics, double peak structures, with one of the peaks at the threshold voltage and the other at the flat-band voltage, are found. The separation into two peaks is shown to be due to the change of the charging/discharging carrier sources between the source/drain and the substrate in the channel depletion region. These show that the carrier charging/discharging characteristics change critically at each of the threshold voltage and the flat-band voltage. Charging/discharging rate reduction due to the surface potential flexibility and the carrier number shortage in the channel depletion region is proposed to explain the critical changes.
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Ohba et al. (2000) studied this question.
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