A novel switched-capacitor circuit is proposed for digital multiplication and division. The inputs (two binary numbers) are first converted to analog charges by means of binary-weighted capacitor arrays. Then, multiplication or division is performed between these charges to provide the product or ratio in the form of an analog voltage. Finally, the resulting analog voltage is converted to a binary number by successiveapproximation analog-to-digital (A/D) conversion. An error analysis using the charge conservation equation has shown that a 10-bit accuracy is obtainable using this technique with presently available MOS technology. An experimental circuit was built and tested. The results confirmed the principles of operation.
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Watanabe et al. (1984) studied this question.
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