Ferroelectric nonvolatile memory technology: applications and integration challenges

Challenges in the integration of ferroelectric nonvolatile memories with complementary metal-oxide-semiconductor (CMOS) technology for low-voltage and low-power applications are discussed. The main driving force for commercialization is to take advantage of the true high-speed (100 ns), low-voltage (0.9 V) write potential of ferroelectric memories. The operation of ferroelectric nonvolatile memories and different integration approaches are discussed. Specifically, the effort in integrating SrBi/sub 2/Ta/sub 2/O/sub 9/ ferroelectrics with CMOS is reviewed. For the first time, ferroelectric capacitor and CMOS transistor properties after integration through metallization are presented.