Design of a low-power nonvolatile flip-flop using three-terminal magnetic-tunnel-junction-based self-terminated mechanism

A nonvolatile flip-flop (NV-FF) using a three-terminal magnetic tunnel junction (3T-MTJ)-based self-terminated mechanism is proposed for a low-power logic LSI while maintaining almost the same performance as a conventional CMOS-based logic LSI. The use of a self-terminated mechanism, which continuously monitors the change in MTJ resistance, makes it possible not only to minimize the write energy consumption for the 3T-MTJ device but also to ensure a reliable write. Moreover, since the write current path is separated from the read current path in the 3T-MTJ device, the sensing circuit and the write driver are individually optimized, which makes it possible to minimize the performance overhead due to additional components. As a result, the write energy of the proposed NV-FF is reduced by 69% with a small performance overhead compared with that of a conventional NV-FF using a worst-case-oriented writing scheme.