Dielectrically isolated saturating circuits

A description of the three main substrate preparation processes to achieve silicon dioxide dielectric isolation are described. The use of dielectric isolation for high-speed and low-power circuits is outlined, with calculations of saturation resistance and transient characteristics. Introduction of carrier lifetime-reducing gold into a dielectrically isolated wafer can cause problems, which are delineated. Final results are listed and Photomicrographs of working circuits are presented.