Sub-100 nm KrF lithography for complementary metal–oxide–semiconductor circuits

Sub-100 nm metal–oxide–semiconductor field effect transistor gate structures have been fabricated using resolution-enhanced 248 nm optical lithography. We employed the chromeless phase-shift approach together with thin resists and optimized etches to achieve these results. Polysilicon gratings with critical dimension (CD)≈60 nm and TiN (damascene) gratings with CD≈35 nm have been fabricated with good process latitudes. We are applying this process to the fabrication of basic test circuits for an aggressively scaled silicon on insulator complementary metal–oxide–semiconductor technology.