Electronic trap states at the interface of the gate insulator and the organic semiconductor play a decisive role for the current–voltage characteristic of organic field effect transistors. In this article two techniques will be introduced which eliminate and generate those trap states on SiO2 as well as polymer dielectric interfaces, respectively. Employing these interface modifications, p‐ and n‐type pentacene field‐effect transistors as well as an organic CMOS inverter with a single organic semiconductor and a single type of source–drain metallization were engineered. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)
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Benson et al. (2008) studied this question.
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