The series single‐phase modular multilevel converter (SSP–MMC) is investigated as one option for high‐voltage direct current tap aimed to reduce the number of switching devices by one‐third. First an approximation method is applied to calculate the sub‐module capacitor voltage of the proposed SSP–MMC. Based on that, the approximate equivalent circuits for ac and dc sides are both presented to demonstrate the mechanism of the second and third harmonics. Then the methods to reduce the second and third harmonics are proposed as parts of the overall control loop. Simulation results obtained in power system computer aided design (PSCAD) are provided to validate the brief equivalent models and the second and third harmonic reduction methods.
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Hao et al. (2013) studied this question.
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