Electrical Properties of Low-Temperature-Compatible P-Channel Polycrystalline-Silicon TFTs Using High-κ Gate Dielectrics

In this paper, we describe a systematic study of the electrical properties of low-temperature-compatible p-channel polycrystalline-silicon thin-film transistors (poly-Si TFTs) using HfO2and HfSiOx, high-k gate dielectrics. Because of their larger gate capacitance density, the TFTs containing the high-k gate dielectrics exhibited superior device performance in terms of higher Ion/Ioffcurrent ratios, lower subthreshold swings (SSs), and lower threshold voltages (Vth), relative to conventional deposited-SiO2, albeit with slightly higher OFF-state currents. The TFTs incorporating HfSiOx, as the gate dielectric had ca. 1.73 times the mobility (muFE) relative to that of the deposited-SiO2TFTs; in contrast, the HfO2TFTs exhibited inferior mobility. We investigated the mechanism for the mobility degradation in these HfO2TFTs. The immunity of the HfSiOx, TFTs was better than that of the HfO2TFTs-in terms of their Vthshift, SS degradation, muFEdegradation, and drive current deterioration-against negative bias temperature instability stressing. Thus, we believe that HfSiOx, rather than HfO2, is a potential candidate for use as a gate-dielectric material in future high-performance poly-Si TFTs.