A four-bit silicon bipolar analog-to-digital converter (ADC) which is operational at the full Nyquist input frequency up to 1 Gsample/s (Gs/s) is discussed. The effective bit number at 1 Gs/s reduces to 3.5 bits on Nyquist conditions. The 3-dB large-signal analog bandwidth is 800 MHz and the maximum sampling rate reaches 2 Gs/s and beyond. The converter is built up by stacking of two three-bit subcircuits. The ADC architecture relies on a balanced structure mixing conventional flash-converter elements with analog encoding. Total power consumption is 2.4 W. Standard silicon bipolar technology is used without self-alignment.>
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Daniel et al. (1988) studied this question.
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