Low Thermal Budget (<250 °C) Dual-Gate Amorphous Indium Tungsten Oxide (IWO) Thin-Film Transistor for Monolithic 3-D Integration

We experimentally demonstrate back-end-of-the-line (BEOL) compatible (2O3(IWO) back-gate field-effect transistor (BGFET) and dual-gate field-effect transistor (DGFET) with 7-nm channel thickness. The 100-nm channel length IWO DGFET exhibits excellent subthreshold slope of 73 mV/decade, record ID,SATof 370 μA/μm, and on-off ratio > 4 × 109at VDS= 1 V and VGS-VTH= 2 V. We identify fundamental transport mechanisms that limit electron mobility in amorphous IWO transistors at different gate-bias (VGS) and temperature. Benchmarking reveals that amorphous IWO FETs are promising candidate for in situ transistor fabrication in the BEOL for enabling high-performance monolithic 3-D (M3-D) integrated circuits.