A new modified Manchester carry chain (MCC) is presented. The objective is to reduce the carry propagation delay in the chain obtaining a layout-oriented architecture. The modification provides bypass (carry-skip) routes for the carry to propagate through quickly, avoiding long carry propagation paths that go through the entire carry chain. When realised using AMS 0.35 μm 2-poly 3-metal 3.3V CMOS technology (CSD), a 32-bit adder designed as described here shows a computational delay of about 2.2 ns and an energy dissipation of only 27 pJ. This represents a significant improvement in terms of energy–delay product with respect to both conventional MCC adders and newer adder structures.
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Perri et al. (2004) studied this question.
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